Depto. de Semicondut. Instrumentos e Fotônica

Trabalhos completos publicados em anais de congressos internacionais

1.
F.Damiani, M.J.Perez e W.Machaca Luque, ``Disign of a Kohonen Neural Net Neuron - VHDL Description'', Segundo Workshop Iberchip, Brasil , 1, 429-432, (1996).
2.
R.L.Moreno e C.A.dos Reis Filho, ``A technique for Offset Voltage Cancellation in a CMOS Sample-and-hold Circuit'', II Workshop Iberchip, Brasil , 1, 95-101, (1996).
3.
A.S.Santiago e C.A.dos Reis Filho, ``A CMOS Trigger-Circuit Building Block for Smart-Power Devices'', II Workshop Iberchip, Brasil , 1, 157-164, (1996).
4.
M.dos Santos, C.F.Galan, R.Maltione e C.A.dos Reis Filho, ``An Integrated Large-Sinal Voltage Adder/Subtracter Based on Current Conveyor'', II Workshop Iberchip, Brasil , 1, 112-120, (1996).
5.
E.Acco, R.Maltione e C.A.dos Reis Filho, ``Um Novo Método para Compensação do Erro de Injeção de Carga em Circuitos Sample-and-Hold, usando Chaves Analógicas NMOS'', II Workshop Iberchip, Brasil , 1, 56-65, (1996).
6.
N.I.Morimoto e J.W.Swart, ``Rapid thermal and integrated processing V'', MRS'96 Spring Meeting, Estados Unidos , (1996).
7.
C.A.dos Reis Filho e W.Germanovix, ``A Novel Technique for Addressing Twoj-Wire Current Loop Transmitters'', Third International Eelctronic Engineering Conference - Intercom'96, Peru , 1, 401-405, (1996).
8.
A.C.Saragossa Ramos, A.C.Redolfi, R.Yoshioca e A.S.Lujan, ``Analysis of Via Hole opening by Plasma Etching in Polyimide for Electrode Access'', XI Conference of Brazilian Microelectronic Society, Brasil , 235-240, (1996).
9.
R.Yoshioka, A.C.Redolfi, A.S.Lujan, T.E.A.Santos, R.G.Pereira e J.W.Swart, ``Ohmic Contacts Suitable for Base, Emitter and Collector Matallizations in AlGaAs/GaAs HBTs'', XI Conference of Brazilian Microelectronic Society, Brasil , 1, 241-246, (1996).
10.
A.C.Redolfi, R.T.Yoshioka e J.W.Swart, ``Empirical HBT Model for HSPICE Circuits Simulation'', XI Conference of Brazilian Microelectronic Society, Brasil , 1, 249-252, (1996).
11.
C.A.dos Reis Filho e A.S.Santiago, ``CMOS Building Block for Smart-Power Integrated Circuits'', Third IEEE International Conference on Electronics, Circuits and Syste, Grecia , 2, 892-895, (1996).
12.
C.A.dos Reis Filho e A.S.Santiago, ``CMOS Building Block for Smart-power Integrated Circuits'', Third IEEE Intern.Conference on electronics,Circuits and systems, Grecia , 2, 892-895, (1996).


3/2/1998